Jun 14, 2013 #1 X xilinx1001 Member level 3 Joined Apr 3, 2013 Messages 60 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Activity points 1,781 Hi, How to convert integer value into decimal in VHDL. I am trying to use conv_std _logic _vector But I am getting some error like below: Code: Undefined symbol 'conv_std_logic_vector'. conv_std_logic_vector: Undefined symbol (last report in this block) How can I solve the problem?. Regards xilinx1001
Hi, How to convert integer value into decimal in VHDL. I am trying to use conv_std _logic _vector But I am getting some error like below: Code: Undefined symbol 'conv_std_logic_vector'. conv_std_logic_vector: Undefined symbol (last report in this block) How can I solve the problem?. Regards xilinx1001
Jun 15, 2013 #2 H HMS1021 Full Member level 2 Joined Oct 22, 2010 Messages 133 Helped 40 Reputation 80 Reaction score 37 Trophy points 1,308 Location Near Boston. USA Activity points 2,464 With just seeing the error it is hard to guess the error in the code. Here is a snippet from working code as a syntax check: tmp <= conv_std_logic_vector(conv_integer(A),9); Be sure to include the required library.
With just seeing the error it is hard to guess the error in the code. Here is a snippet from working code as a syntax check: tmp <= conv_std_logic_vector(conv_integer(A),9); Be sure to include the required library.