FlyingDutch
Advanced Member level 1
- Joined
- Dec 16, 2017
- Messages
- 457
- Helped
- 45
- Reputation
- 92
- Reaction score
- 55
- Trophy points
- 28
- Location
- Bydgoszcz - Poland
- Activity points
- 4,960
Hi,
What I'd do:
* contact the manufacturer
* sign the NDA
* get support (datasheets, application notes)
it is
Klaus
I agree. The FIFO version is particularly interesting if your host hardware isn't able to keep up with the OV7670 pixel rate. This problem shouldn't occur with a FPGA system.There are basic information and timing diagrams, I think it is enough information to connect it to FPGA.
Hi,I have done some work on OV7670、OV5640 sensor and both sensor has no buffer.First,if your pcb board has enough interface for sensor module and your pcb layout has done the Signal Integrity problem,the only problem can be coding、simulation and testing.To deal with sensor without buffer ,you will need a fifo in the FPGA hierarchy.
## Pin assignment
set_property CFGBVS VCCO [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]
#############SPI Configurate Setting##################
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
set_property CONFIG_MODE SPIx4 [current_design]
set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
############## clock and reset define##################
create_clock -period 20.000 [get_ports clk100]
set_property IOSTANDARD LVCMOS33 [get_ports clk100]
set_property PACKAGE_PIN M22 [get_ports clk100]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {Inst_PLL/clkin1}]
##VGA Connector
set_property PACKAGE_PIN AB26 [get_ports {vga_r[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[0]}]
set_property PACKAGE_PIN AC26 [get_ports {vga_r[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[1]}]
set_property PACKAGE_PIN AB24 [get_ports {vga_r[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[2]}]
set_property PACKAGE_PIN AC24 [get_ports {vga_r[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[3]}]
set_property PACKAGE_PIN AA24 [get_ports {vga_b[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[0]}]
set_property PACKAGE_PIN AB25 [get_ports {vga_b[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[1]}]
set_property PACKAGE_PIN AA22 [get_ports {vga_b[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[2]}]
set_property PACKAGE_PIN AA23 [get_ports {vga_b[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[3]}]
set_property PACKAGE_PIN Y25 [get_ports {vga_g[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[0]}]
set_property PACKAGE_PIN AA25 [get_ports {vga_g[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[1]}]
set_property PACKAGE_PIN W25 [get_ports {vga_g[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[2]}]
set_property PACKAGE_PIN Y26 [get_ports {vga_g[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[3]}]
set_property PACKAGE_PIN Y22 [get_ports vga_hsync]
set_property IOSTANDARD LVCMOS33 [get_ports vga_hsync]
set_property PACKAGE_PIN Y23 [get_ports vga_vsync]
set_property IOSTANDARD LVCMOS33 [get_ports vga_vsync]
## LEDs
set_property PACKAGE_PIN J6 [get_ports {config_finished}]
set_property IOSTANDARD LVCMOS33 [get_ports {config_finished}]
##Buttons
set_property PACKAGE_PIN H7 [get_ports btnc]
set_property IOSTANDARD LVCMOS33 [get_ports btnc]
set_property PACKAGE_PIN J8 [get_ports btnl]
set_property IOSTANDARD LVCMOS33 [get_ports btnl]
set_property PACKAGE_PIN H21 [get_ports btnr]
set_property IOSTANDARD LVCMOS33 [get_ports btnr]
## OV7670 Camera header pins
##Pmod Header JB
##Sch name = JB1
set_property PACKAGE_PIN W21 [get_ports {ov7670_pwdn}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_pwdn}]
##Sch name = JB2
set_property PACKAGE_PIN Y21 [get_ports {ov7670_data[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[0]}]
##Sch name = JB3
set_property PACKAGE_PIN V26 [get_ports {ov7670_data[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[2]}]
##Sch name = JB4
set_property PACKAGE_PIN W26 [get_ports {ov7670_data[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[4]}]
##Sch name = JB7
set_property PACKAGE_PIN U25 [get_ports {ov7670_reset}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_reset}]
##Sch name = JB8
set_property PACKAGE_PIN U26 [get_ports {ov7670_data[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[1]}]
##Sch name = JB9
set_property PACKAGE_PIN V24 [get_ports {ov7670_data[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[3]}]
##Sch name = JB10
set_property PACKAGE_PIN W24 [get_ports {ov7670_data[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[5]}]
##Pmod Header JC
##Sch name = JC1
set_property PACKAGE_PIN V23 [get_ports {ov7670_data[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[6]}]
##Sch name = JC2
set_property PACKAGE_PIN V21 [get_ports ov7670_xclk]
set_property IOSTANDARD LVCMOS33 [get_ports ov7670_xclk]
##Sch name = JC3
set_property PACKAGE_PIN W23 [get_ports ov7670_href]
set_property IOSTANDARD LVCMOS33 [get_ports ov7670_href]
##Sch name = JC4
set_property PACKAGE_PIN V18 [get_ports ov7670_siod]
set_property IOSTANDARD LVCMOS33 [get_ports ov7670_siod]
set_property PULLUP TRUE [get_ports ov7670_siod]
##Sch name = JC7
set_property PACKAGE_PIN W18 [get_ports {ov7670_data[7]}]
set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[7]}]
##Sch name = JC8
set_property PACKAGE_PIN U22 [get_ports ov7670_pclk]
set_property IOSTANDARD LVCMOS33 [get_ports ov7670_pclk]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {ov7670_pclk_IBUF}]
##Sch name = JC9
set_property PACKAGE_PIN V22 [get_ports ov7670_vsync]
set_property IOSTANDARD LVCMOS33 [get_ports ov7670_vsync]
##Sch name = JC10
set_property PACKAGE_PIN U21 [get_ports ov7670_sioc]
set_property IOSTANDARD LVCMOS33 [get_ports ov7670_sioc]
Hi,Hello,
I had finished that project successfuly some time ago. I used QMTECH Artix7 FPGA board - see link:
QMTECH Artix7 FPGA board
Camera sensor OV7670 is working properly, but with resolution 320x240. I had to modify project a little - constarint file for Artix7 QMTECH FPGA board is"
Code:## Pin assignment set_property CFGBVS VCCO [current_design] set_property CONFIG_VOLTAGE 3.3 [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] #############SPI Configurate Setting################## set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property CONFIG_MODE SPIx4 [current_design] set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design] ############## clock and reset define################## create_clock -period 20.000 [get_ports clk100] set_property IOSTANDARD LVCMOS33 [get_ports clk100] set_property PACKAGE_PIN M22 [get_ports clk100] set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {Inst_PLL/clkin1}] ##VGA Connector set_property PACKAGE_PIN AB26 [get_ports {vga_r[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[0]}] set_property PACKAGE_PIN AC26 [get_ports {vga_r[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[1]}] set_property PACKAGE_PIN AB24 [get_ports {vga_r[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[2]}] set_property PACKAGE_PIN AC24 [get_ports {vga_r[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_r[3]}] set_property PACKAGE_PIN AA24 [get_ports {vga_b[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[0]}] set_property PACKAGE_PIN AB25 [get_ports {vga_b[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[1]}] set_property PACKAGE_PIN AA22 [get_ports {vga_b[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[2]}] set_property PACKAGE_PIN AA23 [get_ports {vga_b[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_b[3]}] set_property PACKAGE_PIN Y25 [get_ports {vga_g[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[0]}] set_property PACKAGE_PIN AA25 [get_ports {vga_g[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[1]}] set_property PACKAGE_PIN W25 [get_ports {vga_g[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[2]}] set_property PACKAGE_PIN Y26 [get_ports {vga_g[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {vga_g[3]}] set_property PACKAGE_PIN Y22 [get_ports vga_hsync] set_property IOSTANDARD LVCMOS33 [get_ports vga_hsync] set_property PACKAGE_PIN Y23 [get_ports vga_vsync] set_property IOSTANDARD LVCMOS33 [get_ports vga_vsync] ## LEDs set_property PACKAGE_PIN J6 [get_ports {config_finished}] set_property IOSTANDARD LVCMOS33 [get_ports {config_finished}] ##Buttons set_property PACKAGE_PIN H7 [get_ports btnc] set_property IOSTANDARD LVCMOS33 [get_ports btnc] set_property PACKAGE_PIN J8 [get_ports btnl] set_property IOSTANDARD LVCMOS33 [get_ports btnl] set_property PACKAGE_PIN H21 [get_ports btnr] set_property IOSTANDARD LVCMOS33 [get_ports btnr] ## OV7670 Camera header pins ##Pmod Header JB ##Sch name = JB1 set_property PACKAGE_PIN W21 [get_ports {ov7670_pwdn}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_pwdn}] ##Sch name = JB2 set_property PACKAGE_PIN Y21 [get_ports {ov7670_data[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[0]}] ##Sch name = JB3 set_property PACKAGE_PIN V26 [get_ports {ov7670_data[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[2]}] ##Sch name = JB4 set_property PACKAGE_PIN W26 [get_ports {ov7670_data[4]}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[4]}] ##Sch name = JB7 set_property PACKAGE_PIN U25 [get_ports {ov7670_reset}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_reset}] ##Sch name = JB8 set_property PACKAGE_PIN U26 [get_ports {ov7670_data[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[1]}] ##Sch name = JB9 set_property PACKAGE_PIN V24 [get_ports {ov7670_data[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[3]}] ##Sch name = JB10 set_property PACKAGE_PIN W24 [get_ports {ov7670_data[5]}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[5]}] ##Pmod Header JC ##Sch name = JC1 set_property PACKAGE_PIN V23 [get_ports {ov7670_data[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[6]}] ##Sch name = JC2 set_property PACKAGE_PIN V21 [get_ports ov7670_xclk] set_property IOSTANDARD LVCMOS33 [get_ports ov7670_xclk] ##Sch name = JC3 set_property PACKAGE_PIN W23 [get_ports ov7670_href] set_property IOSTANDARD LVCMOS33 [get_ports ov7670_href] ##Sch name = JC4 set_property PACKAGE_PIN V18 [get_ports ov7670_siod] set_property IOSTANDARD LVCMOS33 [get_ports ov7670_siod] set_property PULLUP TRUE [get_ports ov7670_siod] ##Sch name = JC7 set_property PACKAGE_PIN W18 [get_ports {ov7670_data[7]}] set_property IOSTANDARD LVCMOS33 [get_ports {ov7670_data[7]}] ##Sch name = JC8 set_property PACKAGE_PIN U22 [get_ports ov7670_pclk] set_property IOSTANDARD LVCMOS33 [get_ports ov7670_pclk] set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {ov7670_pclk_IBUF}] ##Sch name = JC9 set_property PACKAGE_PIN V22 [get_ports ov7670_vsync] set_property IOSTANDARD LVCMOS33 [get_ports ov7670_vsync] ##Sch name = JC10 set_property PACKAGE_PIN U21 [get_ports ov7670_sioc] set_property IOSTANDARD LVCMOS33 [get_ports ov7670_sioc]
In attachement is ziped full project for Vivado 2018.3.(working properly). I have to made VGA DAC based on resitors - here is schematics (get from Basys3 FPGA board):
View attachment 163197
If you have code in HDL for this (OV7670) or similaiar camera sensor and you would like share it then I will be happy .
Best regards
theory related to "stereo vision"
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?