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how to code for xilinx ipcoregen...........

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watabe112

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hi.....i want to ask.....if anyone how to solve this.....i'm using xilinx ipcore gen.....addition core......in the core there are 2 input and one output........for example if i have many value as an input......for example i have 5 value.......how i'm going to add it......i'm using verilog.....how i'm going to implement it to the addition core that only have 2 input......please anyone help me.....give an example.......
 

Read datasheet of addition IP core first.

BTW, writing in standard english format won't hurt!!
 

When you use coregen, generally there is also a "documentation" or "information" or some such button there that will take you to the relevant docs.

Also, when you have generated the core, in project navigator you can select the core and then do "view instantiation template". That should get you underway in using the core in your code.

hope that help. :)
 

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