how to check that a clock is running in an elegant way?

[Arturi]

Dear all,

how would you check that a clock is actually running using verilog?

How would you check that this same clock has changed its polarity??

Your help is appreciated and of course recognized.

cheers!

 

[manish12]

use freq meter for the same (pic based freq is so chep)

or

use counter chip such as cd4040 and used one of the output pins to drive the led .

 

[FvM]

This impossible without a second clock or a particular hardware. With Altera FPGA (probably others too), you can use PLL lock signal to detect presence of a clock. When the clock stops, you can disable critical output signal asynchronously from this signal.

P.S.: There is another possibility using logic delay chains. But the technique is strongly disliked by FPGA tools, causing showers of timing errors and such. Also a delay chain ring oscillator could be possibly used for a clock monitor, avoiding external components for this function.

 

[iwpia50s]

Your question does not indicate if you mean in actual hardware or in a Verilog simulator.

Added after 52 seconds:

If in a simulator then you should have a waveform viewer, if in actual hardware, then the chip won't do anything without the clock.

 

[echo47]

Please clarify what you mean by "changed its polarity". An inverted clock looks very similar to the original clock. Or do you mean negative voltage?

It may help the discussion if you explain why you need to do this.

 

[vinun_7]

Please clarify what you mean by "changed its polarity". An inverted clock looks very similar to the original clock. Or do you mean negative voltage?

It may help the discussion if you explain why you need to do this.

If its in a testbench environment where u can to check whether the clock is running or not then it can be accomplished using a task. Just pass the clock as an argument to the task.Pass thee expected period also. Check whether the polarity has toggled or not. By waiting for posedge and subsequent negedge u can also check the time period.