what do you mean by burst bus transaction
It is up to the master how it responds to an Error during a burst. It is allowed to terminate the burst, or to continue the burst. What it does with the error is also up to the master - it can try the access again, or it may be that it reports a problem (blue screen of death style).
ARM processors will typically continue the burst until the end. The error response usually maps to the processor taking its prefetch or data abort exception (although some ARM processors will simply ignore errors on cache/write buffer operations) and carry on as if nothing had happened. The abort handler code is up to the system designer - in embedded systems an error would often mean that there's a problem and it might have to do a soft reset.
Basically, the AHB specification defines a protocol for a slave to signal a problem to a master. It doesn't define what you should do about the problem - that's up to your system.