Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

How to carry out simulation in Cadence Design suite

Status
Not open for further replies.

matrixofdynamism

Advanced Member level 2
Joined
Apr 17, 2011
Messages
550
Helped
24
Reputation
48
Reaction score
23
Trophy points
1,298
Activity points
7,216
I have IBIS models and need to carry out simulation with them. The idea is to determine if any undesirable high speed effects shall occur on a single signal line. I have IBIS model of all the parts involved and the PCB track information. However, no tool here exists that can simulate IBIS models. Therefore, the models were converted to PSpice form. I am still not sure how to use them in simulation.

I have the Cadence Allegro 16.6.032 which I have no experience with but conclude that it can simulate the PSpice models. Under Cadence Allegro 16.6.032 I get this long list of programs in the start menu:

Allegro PCB Planner
Design Entry CIS
Design Entry HDL Rules Checker
Design Entry HDL
FPGA System Planner
Library Explorer
License Client Configuration Utility
OrCAD Capture CIS
OrCAD Capture LITE
OrCAD Capture View-Only
OrCAD Capture
Package Designer
PCB Editor
PCB Route
PCB SI
Physical Viewer
Project Manager
PSpice AD
PSpice Advanced Analysis
SiP Digital Architect
SiP
System Architect

There are also some more directories
AMS Simulator
PCB Editor Utilities
PCB SI Utilities
PSpice Accessories


Well, I am totally lost........ I have no idea how to even carry out a simple inverting op-amp with sine wave input in Cadence Allegro. I have never used it before. Do you have advice on where I should go next? Somebody told me to use AMS simulator and for that purpose the schematic shall be made in Allegro Design Entry HDL. However, I don't know how to use them also. Allegro has so many tools that I am not sure which shall be used here.
 

Electro nS

Full Member level 6
Joined
Mar 9, 2013
Messages
323
Helped
49
Reputation
98
Reaction score
47
Trophy points
1,308
Activity points
3,786
OrCAD Capture CIS

use this to create a new project , you draw schematic from existing libraries , then simulate

all other programs are not needed
 

matrixofdynamism

Advanced Member level 2
Joined
Apr 17, 2011
Messages
550
Helped
24
Reputation
48
Reaction score
23
Trophy points
1,298
Activity points
7,216
Is OrCAD Capture CIS used for all SPICE simulations? is there any tool in that list which can directly use IBIS models? Does this mean I do not need to use the program called Project Manager? Why do I get option for VHDL as well? Don't people usually use ModelSim/QuestaSim which has been especially designed for this purpose of HDL simulation?

So this means that I need not bother about AMS simulator and Allegro Design Entry HDL, hmmmmmmmmmmmmmmmmmmmmmmmmmmm
 

matrixofdynamism

Advanced Member level 2
Joined
Apr 17, 2011
Messages
550
Helped
24
Reputation
48
Reaction score
23
Trophy points
1,298
Activity points
7,216
OK, so here is a new issue. I found that while the IBIS model may have many pins as is clear from the IBIS file itself, one I convert this is converted into PSPICE model, is has only 1 or 3 pins. These are named input or input, output, enable. How can this be? What is going on here?
 

mvaseem

Full Member level 2
Joined
Dec 22, 2009
Messages
144
Helped
64
Reputation
128
Reaction score
63
Trophy points
1,308
Location
India
Activity points
2,081
If you noticed IBIS file, there are multiple pins that map to same model definition. The model type may be Input, output or IO.
Suppose pins 1 to 5 map to model "xyz".
The translator would create one model for "xyz" with 3 pins (assuming it is IO type).
You would need to use this model 5 times in your design for the 5 pins.
Hope this clarifies.
 

matrixofdynamism

Advanced Member level 2
Joined
Apr 17, 2011
Messages
550
Helped
24
Reputation
48
Reaction score
23
Trophy points
1,298
Activity points
7,216
What information from the PCB is needed for purpose of this simulation? is merely the PCB track propagation delay along with characteristic impedance enough? how should the PCB track be modelled in the simulation?
 

mvaseem

Full Member level 2
Joined
Dec 22, 2009
Messages
144
Helped
64
Reputation
128
Reaction score
63
Trophy points
1,308
Location
India
Activity points
2,081
I think for that you'll need "sigrity" tool set. It's suite called "Power SI" would extract s-parameter model of the track. That can be converted to spice model using tool called "Broad Band Spice". That you can simulate using Pspice.
 

matrixofdynamism

Advanced Member level 2
Joined
Apr 17, 2011
Messages
550
Helped
24
Reputation
48
Reaction score
23
Trophy points
1,298
Activity points
7,216
well... err.. the software list that I have is in the post on to the top, I do not have sigrity. which tool within cadence design suite can be used for this purpose?

I know about characteristic impedance and its importance in signal integrity, but what in the world is an S-parameter? is the characteristic impedance not sufficient?
 

mvaseem

Full Member level 2
Joined
Dec 22, 2009
Messages
144
Helped
64
Reputation
128
Reaction score
63
Trophy points
1,308
Location
India
Activity points
2,081
If it's a simple trace (straight line), it can be modeled as transmission line.
For complex geometries, it has to be solved by field solver. PCB SI should have some solver which would give you output dump in form of RLC.
 

matrixofdynamism

Advanced Member level 2
Joined
Apr 17, 2011
Messages
550
Helped
24
Reputation
48
Reaction score
23
Trophy points
1,298
Activity points
7,216
If a single PCB track is splitting into multiple tracks, I see no reason why it can't be modelled by connecting multiple transmission lines together.

Besides this, why is it that the IBIS models converted into PSpice do not have any power supply connection and especialy no ground? I have an IBIS model converted into PSpice of an input buffer and all the resulting PSpice model has is an input port and nothing else. How can the simulator simulate this type of thing when there is no "loop" that can be formed for current flow. This makes absolutely no sense, whatsoever.
 

mvaseem

Full Member level 2
Joined
Dec 22, 2009
Messages
144
Helped
64
Reputation
128
Reaction score
63
Trophy points
1,308
Location
India
Activity points
2,081
I think the method won't be very accurate as it would not take care of bends etc in the track.

As for IBIS - The pspice model has power and ground inside the model itself. Look at the subckt definition of a particular model, there are voltage sources VCC and VEE with same values as in IBIS model.
 

Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top