How to calculate the aligned address

[dll_fpga]

Please help me understand the concept of aligned address and how to calculate it?

I saw the below equation from AXI spec
Aligned_Address = (INT(Start_Address / Number_Bytes) ) x Number_Bytes.

 

[jbeniston]

If you want to access 4 bytes, your address must be aligned to 4. i.e. 0, 4, 8, 12..

Addresses 1, 2, 3 are non aligned to a 4 byte boundary.

 

[dll_fpga]

If you want to access 4 bytes, your address must be aligned to 4. i.e. 0, 4, 8, 12..

Addresses 1, 2, 3 are non aligned to a 4 byte boundary.

Is it required to be always a power of 2

can it be 0 5 10 to access 5 byte info?

 

[jbeniston]

Yes, it must be a power of two. See the allowed values for ARSIZE or AWSIZE. There is only one SIZE value that is used for each beat within a burst.