how to calculate Leff & Weff for 18o nm tech

[pratibhagupta]

hello every one


while calculating Leff, i need LD where i will get value of LD? In TSMC180 i didnt find LD & WD values?
plz reply

 

[erikl]

Re: how to calculate Leff & Weff for 18o nm tech

Here's an old TSMC 0.18um Mixed Signal Spice Model file, which includes these values (there, named LDELTA & WDELTA):

 

[pratibhagupta]

hello ,

i am attaching my file, will you plz tell me where is LD & WD in my file. or if i'll use value given by ur file is their any problem in calculation?
coz i find difference in ur & mine file.

TSMC180 file as below



* MOSIS WAFER ACCEPTANCE TESTS

* RUN: T55U (LO_EPI) VENDOR: TSMC
* TECHNOLOGY: SCN018 FEATURE SIZE: 0.18 microns
* Run type: SKD


*INTRODUCTION: This report contains the lot average results obtained by MOSIS
* from measurements of MOSIS test structures on each wafer of
* this fabrication lot. SPICE parameters obtained from similar
* measurements on a selected wafer are also attached.

*COMMENTS: DSCN6M018_TSMC


*TRANSISTOR PARAMETERS W/L N-CHANNEL P-CHANNEL UNITS

* MINIMUM 0.27/0.18
* Vth 0.51 -0.52 volts

* SHORT 20.0/0.18
* Idss 584 -290 uA/um
* Vth 0.53 -0.52 volts
* Vpt 4.7 -5.4 volts

* WIDE 20.0/0.18
* Ids0 23.1 -17.9 pA/um

* LARGE 50/50
* Vth 0.44 -0.42 volts
* Vjbkd 3.2 -4.1 volts
* Ijlk <50.0 <50.0 pA

* K' (Uo*Cox/2) 172.9 -35.2 uA/V^2
* Low-field Mobility 410.59 83.59 cm^2/V*s

*COMMENTS: Poly bias varies with design technology. To account for mask
* bias use the appropriate value for the parameters XL and XW
* in your SPICE model card.
* Design Technology XL (um) XW (um)
* ----------------- ------- ------
* SCN6M_DEEP (lambda=0.09) 0.00 -0.01
* thick oxide 0.00 -0.01
* SCN6M_SUBM (lambda=0.10) -0.02 0.00
* thick oxide -0.02 0.00


*FOX TRANSISTORS GATE N+ACTIVE P+ACTIVE UNITS
* Vth Poly >6.6 <-6.6 volts


*PROCESS PARAMETERS N+ P+ POLY N+BLK PLY+BLK M1 M2 UNITS
* Sheet Resistance 6.5 7.5 7.7 60.6 313.8 0.08 0.08 ohms/sq
* Contact Resistance 9.9 10.4 9.1 4.69 ohms
* Gate Oxide Thickness 41 angstrom

*PROCESS PARAMETERS M3 POLY_HRI M4 M5 M6 N_W UNITS
* Sheet Resistance 0.08 1855.0 0.08 0.08 0.04 935 ohms/sq
* Contact Resistance 10.87 15.76 20.68 22.72 ohms

* COMMENTS: BLK is silicide block.


*CAPACITANCE PARAMETERS N+ P+ POLY M1 M2 M3 M4 M5 M6 D_N_W N_W UNITS
* Area (substrate) 966 1172 105 39 19 13 8 8 3 124 aF/um^2
* Area (N+active) 8378 55 20 14 11 9 8 aF/um^2
* Area (P+active) 8164 aF/um^2
* Area (poly) 65 17 10 7 5 4 aF/um^2
* Area (metal1) 37 14 9 7 5 aF/um^2
* Area (metal2) 38 14 9 6 aF/um^2
* Area (metal3) 39 15 9 aF/um^2
* Area (metal4) 38 14 aF/um^2
* Area (metal5) 35 aF/um^2
* Area (r well) 989 aF/um^2
* Area (no well) 142 aF/um^2
* Fringe (substrate) 268 231 -- 59 54 41 23 -- aF/um
* Fringe (poly) 62 38 29 24 20 17 aF/um
* Fringe (metal1) 56 35 22 19 aF/um
* Fringe (metal2) 49 35 27 23 aF/um
* Fringe (metal3) 53 34 28 aF/um
* Fringe (metal4) 58 36 aF/um
* Fringe (metal5) 57 aF/um


*CIRCUIT PARAMETERS UNITS
* Inverters K
* Vinv 1.0 0.75 volts
* Vinv 1.5 0.79 volts
* Vol (100 uA) 2.0 0.08 volts
* Voh (100 uA) 2.0 1.64 volts
* Vinv 2.0 0.82 volts
* Gain 2.0 -22.30
* Ring Oscillator Freq.
* D1024_THK (31-stg,3.3V) 331.24 MHz
* DIV1024 (31-stg,1.8V) 419.10 MHz
* Ring Oscillator Power
* D1024_THK (31-stg,3.3V) 0.07 uW/MHz/gate
* DIV1024 (31-stg,1.8V) 0.02 uW/MHz/gate

* COMMENTS: DEEP_SUBMICRON




* T55U SPICE BSIM3 VERSION 3.1 PARAMETERS

*SPICE 3f5 Level 8, Star-HSPICE Level 49, UTMOST Level 8

* DATE: Jul 29/05
* LOT: T55U WAF: 3003
* Temperature_parameters=Default
.MODEL NMOS NMOS ( LEVEL = 49
+VERSION = 3.1 TNOM = 27 TOX = 4.1E-9
+XJ = 1E-7 NCH = 2.3549E17 VTH0 = 0.3719233
+K1 = 0.5847845 K2 = 1.987508E-3 K3 = 1E-3
+K3B = 3.846051 W0 = 1.00001E-7 NLX = 1.66359E-7
+DVT0W = 0 DVT1W = 0 DVT2W = 0
+DVT0 = 1.616073 DVT1 = 0.4422105 DVT2 = 0.0205098
+U0 = 276.4769418 UA = -1.287181E-9 UB = 2.249816E-18
+UC = 5.695845E-11 VSAT = 1.050018E5 A0 = 1.8727159
+AGS = 0.4223855 B0 = -8.460618E-9 B1 = -1E-7
+KETA = -6.583564E-3 A1 = 0 A2 = 0.8925017
+RDSW = 105 PRWG = 0.5 PRWB = -0.2
+WR = 1 WINT = 0 LINT = 1.509138E-8
+XL = 0 XW = -1E-8 DWG = -3.993667E-9
+DWB = 1.211844E-8 VOFF = -0.0926198 NFACTOR = 2.4037852
+CIT = 0 CDSC = 2.4E-4 CDSCD = 0
+CDSCB = 0 ETA0 = 2.64529E-3 ETAB = -1.113687E-5
+DSUB = 0.0107822 PCLM = 0.7114924 PDIBLC1 = 0.1861265
+PDIBLC2 = 2.341517E-3 PDIBLCB = -0.1 DROUT = 0.708139
+PSCBE1 = 8E10 PSCBE2 = 9.186022E-10 PVAG = 5.128699E-3
+DELTA = 0.01 RSH = 6.5 MOBMOD = 1
+PRT = 0 UTE = -1.5 KT1 = -0.11
+KT1L = 0 KT2 = 0.022 UA1 = 4.31E-9
+UB1 = -7.61E-18 UC1 = -5.6E-11 AT = 3.3E4
+WL = 0 WLN = 1 WW = 0
+WWN = 1 WWL = 0 LL = 0
+LLN = 1 LW = 0 LWN = 1
+LWL = 0 CAPMOD = 2 XPART = 0.5
+CGDO = 7.9E-10 CGSO = 7.9E-10 CGBO = 1E-12
+CJ = 9.604799E-4 PB = 0.8 MJ = 0.3814692
+CJSW = 2.48995E-10 PBSW = 0.8157576 MJSW = 0.1055989
+CJSWG = 3.3E-10 PBSWG = 0.8157576 MJSWG = 0.1055989
+CF = 0 PVTH0 = -4.358982E-4 PRDSW = -5
+PK2 = 2.550846E-4 WKETA = 1.466293E-3 LKETA = -7.702306E-3
+PU0 = 23.8250665 PUA = 1.058432E-10 PUB = 0
+PVSAT = 1.294978E3 PETA0 = 1.003158E-4 PKETA = -3.857329E-3 )
*
.MODEL PMOS PMOS ( LEVEL = 49
+VERSION = 3.1 TNOM = 27 TOX = 4.1E-9
+XJ = 1E-7 NCH = 4.1589E17 VTH0 = -0.3955237
+K1 = 0.5694604 K2 = 0.0291529 K3 = 0.0997496
+K3B = 13.9442535 W0 = 1.003165E-6 NLX = 9.979192E-8
+DVT0W = 0 DVT1W = 0 DVT2W = 0
+DVT0 = 0.5457988 DVT1 = 0.2640392 DVT2 = 0.1
+U0 = 118.0169799 UA = 1.591918E-9 UB = 1.129514E-21
+UC = -1E-10 VSAT = 1.545232E5 A0 = 1.6956519
+AGS = 0.3816925 B0 = 4.590751E-7 B1 = 1.607941E-6
+KETA = 0.0142165 A1 = 0.4254052 A2 = 0.3391698
+RDSW = 168.2822665 PRWG = 0.5 PRWB = -0.5
+WR = 1 WINT = 0 LINT = 3.011839E-8
+XL = 0 XW = -1E-8 DWG = -4.05222E-8
+DWB = 4.813652E-9 VOFF = -0.099839 NFACTOR = 1.8347784
+CIT = 0 CDSC = 2.4E-4 CDSCD = 0
+CDSCB = 0 ETA0 = 0.201776 ETAB = -0.1409866
+DSUB = 1.0474138 PCLM = 1.4195047 PDIBLC1 = 2.422412E-4
+PDIBLC2 = 0.022477 PDIBLCB = -1E-3 DROUT = 1.228009E-3
+PSCBE1 = 1.245755E10 PSCBE2 = 3.598031E-9 PVAG = 15.0414628
+DELTA = 0.01 RSH = 7.5 MOBMOD = 1
+PRT = 0 UTE = -1.5 KT1 = -0.11
+KT1L = 0 KT2 = 0.022 UA1 = 4.31E-9
+UB1 = -7.61E-18 UC1 = -5.6E-11 AT = 3.3E4
+WL = 0 WLN = 1 WW = 0
+WWN = 1 WWL = 0 LL = 0
+LLN = 1 LW = 0 LWN = 1
+LWL = 0 CAPMOD = 2 XPART = 0.5
+CGDO = 6.34E-10 CGSO = 6.34E-10 CGBO = 1E-12
+CJ = 1.177729E-3 PB = 0.8467926 MJ = 0.4063096
+CJSW = 2.417696E-10 PBSW = 0.851762 MJSW = 0.3387253
+CJSWG = 4.22E-10 PBSWG = 0.851762 MJSWG = 0.3387253
+CF = 0 PVTH0 = 1.406461E-3 PRDSW = 11.5261879
+PK2 = 1.718699E-3 WKETA = 0.0353107 LKETA = -1.277611E-3
+PU0 = -1.4642384 PUA = -6.79895E-11 PUB = 1E-21
+PVSAT = 50 PETA0 = 1.003152E-4 PKETA = -3.103298E-3 )
*

 

[erikl]

... will you plz tell me where is LD & WD in my file.

Your file doesn't contain these parameters. May be they're hidden somewhere in a general process file. Try and search for them!

... if i'll use value given by ur file is their any problem in calculation?

Don't think so. Their values seem reasonable. Note: the given parameters are extracted (adapted) values. I'd use them rounded to 2 places, i.e. LD=-2.2E-11 and WD=-74E-11 for the 1.8V MEDIUM VT NMOS DEVICE MODEL.