how to calculate delay in cadence?

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muffassir

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how to calculate the delay of inverter rc extracted layout ..

i calculated the delay from test ckt schematic ..

i want to calc the delay after rc extraction to see the effects of RC components on inverter (from rc extracted layout view)

please give the steps from which view i should start.??

Thanks in advance!!
 

If this is Assura, then you first need a clean LVS, then you run RCX, then you
prepare the av_analog_extracted view, then create the config view for your
simulation testbench; open it, start analog environment and select that view
for the inverters and then proceed with simulating.
 

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