I have run the post layout simution with cadence.
To simulate the loop stability, wo have to cut the node in the feedback loop for simulation.
So I find the nodes in the netlist file, rename some of the nodes to sapseparate it into two nodes. Then I make the two nodes into pins by adding the definition for these two pins in the begining of the netlist file. The corresponding "spectre"(transformed by the "symble") in the testbench is modified too.
The question is when I run the simulation, the voltage of the new added pins are always 0 even if I connected them together in the outside to resume the circuit.
Waiting for your help