SPECIAL_PAD = GPDB35V
INPUT_PAD = PDIZ
INPUT_SCHM_PAD = PDISZ
PULLH_PAD = PDU04TZ
OUTPUT_PAD = PDT08TZ
INOUT_PAD = PDB08TZ
current_design = "pad"
set_port_is_pad {P0_7, P0_6, P0_5, P0_4, P0_3, P0_2, P0_1, P0_0}
set_port_is_pad {P1_7, P1_6, P1_5, P1_4, P1_3, P1_2, P1_1, P1_0}
set_port_is_pad {P2_7, P2_6, P2_5, P2_4, P2_3, P2_2, P2_1, P2_0}
set_port_is_pad {P3_7, P3_6, P3_5, P3_4, P3_3, P3_2, P3_1, P3_0}
set_port_is_pad {sfr_data ,rom_data, rom_addr}
set_port_is_pad {test_mode0, test_mode1, test_rd, test_wr, test_RW_dir}
set_port_is_pad {RST,PassCrystalFun,dma_req,addr_len,sel_xtal_ring}
set_port_is_pad {sfr_wr, sfr_rd, sfr_rw_dir, sfr_addr}
set_port_is_pad {rom_oe, load_ok, core_clk_out, fail_delay_out, ALE, MemoryMap}
set_pad_type -exact INPUT_PAD {test_mode0, test_mode1, test_rd, test_wr, test_RW_dir};
set_pad_type -exact INPUT_PAD {PassCrystalFun,dma_req,addr_len,sel_xtal_ring};
set_pad_type -exact INPUT_SCHM_PAD {RST}
set_pad_type -exact OUTPUT_PAD {sfr_wr, sfr_rd, sfr_rw_dir, sfr_addr};
set_pad_type -exact OUTPUT_PAD {rom_oe, load_ok, core_clk_out, fail_delay_out, ALE, MemoryMap};
set_pad_type -exact INOUT_PAD {sfr_data , rom_data, rom_addr}
set_pad_type -exact INOUT_PAD {P0_7, P0_6, P0_5, P0_4, P0_3, P0_2, P0_1, P0_0}
set_pad_type -exact PULLH_PAD {P1_7, P1_6, P1_5, P1_4, P1_3, P1_2, P1_1, P1_0}
set_pad_type -exact PULLH_PAD {P2_7, P2_6, P2_5, P2_4, P2_3, P2_2, P2_1, P2_0}
set_pad_type -exact PULLH_PAD {P3_7, P3_6, P3_5, P3_4, P3_3, P3_2, P3_1, P3_0}
insert_pads
compile -map_effort med -verify_effort low