Re: Race Condition
I think in forever , you forgot to assign axi_clk . I guess this is psuedo code. How does this avoid race condition ? we'd be able to see if we had a always block , which here is not there! I think this might be a documentation for a older implementation . Most commonly people create clocks like
initial
begin
#20 clk =0;
end
always @ (clk)
begin
# (HALF_CLK_PERIOD) clk = ~clk;
end
Other way is the piece of code you have mentioned. It is my strong belief that Previously axi_clk was probably generated this way and later on converted to the way given by you which is much more elegant to look at.