How the 'N' value should be selected in pll circuit(IC4046)?

[sudh06ic]

DIVIDE BY N CONTER

IN PLL CIRCUIT (IC 4046) THE VCO OUTPUT IS GIVEN TO THE EXTERNAL DIVIDE BY N COUNTER AND FED BACK TO THE PHASE COMPARATOR2.' N' SHOULD BE OF WHAT VALUE IF THE CAPACITOR OF THE VCO VARIES IN THE RANGE OF pF.
I AM DOING THE PROJECT OF MOISTURE MEASUREMENT BY CAPACITANCE METHOD.
HOW THE 'N' VALUE SHOULD BE SELECTED?

 

[neils_arm_strong]

DIVIDE BY N CONTER

If you are talking about a counter, then it should be a digital PLL and the VCO should be a reference clock. The N in divide by N is a variable.
I am not clear which capacitor you are mentioning.

 

[biff44]

Re: How the 'N' value should be selected in pll circuit(IC40

Hmmmmm. perhaps you do not fully understand the concept of a PLL. The 4046 has a VCO whose frequency is determined by the external capacitor C1, and the tuning voltage "VCO IN". It looks like the VCO wants to operate in the 10 KHz to 500 KHz region, depending on the C1 value chosen.

I assume you are using a capacitor C1 that is moisture sensitive, and you will be meausring the "VCO IN" voltage to tell you the humidity. That will only work if the PLL is "locked". To be locked, the PLL has to have a 2nd frequency input at the "SIGNAL IN" pin. So to make it all work, here is what you do:

1) pick a value of C1 that you like
2) look up on the data sheet what the approximate frequency of operation is for the VCO when "VCO IN" voltage is Vdd/2.
3) provide this same frequency to the "Signal IN" pin
4) make sure the control loop filter components R3 and C2 provide a stable loop.

Then just measure the "VCO IN" voltage with a high impedance meter.

You do not need a divide by N in such a scenario. As an example, if the VCO is set to run at 100 KHz, then by choosing "Signal In" to also be 100 KHz, means your divide by N would have N=1.

I think instead you are probably going to have to divide the "Signal IN" frequency. In the above example, you would probably use a 1 MHz crystal controlled oscillator for Signal IN, so you would divide it by 10, giving you 1 MHz/10=100 KHz at the phase detector inputs.