I am working on processor in vhdl code.I am facing multisource error while interfacing with memory. Can anybody suggest how to solve multisource error in vhdl code.I am attaching file with query.
I've looked at your design and have some advice for your mem component :
- do not use inout internal signal, use a data_in bus and a data out bus
- in your process, try to write a code with if ... elsif ... else ... end if, instead of data<= xxxx; if ... then data <= yyyy; end if; if ... then data <= kkkk; end if;