how is input impedance related to fanout ???

[vivekrajeev]

what significance does output impedance have ??? and how are fanout and input impedacne related please direct me to right material

 

[chuckey]

Fanout has no relationship to input impedance of that device. It has a loose link to the input impedance of following devices. Output impedance is the thing. A device has to supply current to successive devices at above the minimum "1" voltage, while doing so it drops the voltage internally via its output impedance. i.e. Vcc - (O/P r X Iout) > V logic "1" min
Frank

 

[emresel]

Hi;
One question;

Vcc - (O/P r X Iout) > V logic "1" min

Here Iout seems to me related to input impedance of the following (driven) devices. Isn't it?

 

[vivekrajeev]

hi frank
from ur reply i understand that output impedance of a cell has link to the input impedance of the following devices. is it right ??? Can you direct me to the material which has figures so that i can understand better


Vcc - (O/P r X Iout) > V logic "1" min

so when a device has high o/p R the Iout it delivers should be less isnt it so that it is greater than > V logic "1" min

 

[chuckey]

As an example, from memory of TTL (40 years ago!). VCC = 5V, V logic "1" > 2.4V, I input = 100uA. With this family of devices there is an internal voltage drop of a diode, .8V?. The fan out is specified at 10. So 5V -.8V -( O/P r X {10 X 100uA)) > 2.4V or 4.2 - (O/P r X 1mA) > 2.4V or 1.8 - (O/P X 1mA) >0 or 1.8 > O/P r X 1ma , So O/P r <1.8K ohms. With CMOS i/p currents at the pica amp level, I am not sure if fanout means anything other then the speed that the input capacity of device (or devices) can be charged.
Frank