How does one add a "test pad" of arbitrary size in Eagle PCB design?
Also, does Eagle allow control of what type of via should be built into a multilayer PCB i.e a via sandwitched between layers or open and accessible on top/bottom layers?
If you are planing to use these test points with a bed of nails tester, you should first know what are the constraints that the manufacturer impose for placement of these testpoints. It suffice for determining its diameter and clearance from other testpoints.
does Eagle allow control of what type of via should be built into a multilayer PCB i.e a via sandwitched between layers or open and accessible on top/bottom layers?