how can use a component with the clock of 1/8 of the clock of main program?

[fahim1]

Hi
I want to use a component inside my code with the clock that is 1/8 of the clock of main code,
how should i declare it in the portmap?

 

[TrickyDicky]

You should create a clock enable (, and run the component at the full clock rate. Using divided clocks will cause you all sorts of problems later on.

example, clock enable that runs at 1/8th the main clock:

---

Code VHDL - [expand]
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signal clk_en_div_8 : std_logic;
signal div_cnt : unsigned(2 downto 0) := "000";
 
process(clk)
begin
  if rising_edge(clk) then
    div_cnt <= div_cnt + 1;
    
    if div_cnt = 0 then
      clk_en_div_8 <= '1';
    else
      clk_en_div_8 <= '0';
    end if;
  end if;
end process;

---

then inside your component, passing the clock enable through the port map:

---

Code VHDL - [expand]
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process(clk)
begin
  if rising_edge(clk) then
    if clk_en_div_8 = '1' then
      --code here runs at 1/8 clock speed
    end if;
  end if;
end process;

---

All good text books and tutorials should teach this as a basic step - does yours not teach you these things?