How can I interpret the linearity graph of this mosfet?

boramm

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hello

I conducted a simulation to check the linearity between the drain and source when the general mosfet is on-state.

A simple circuit was constructed to apply power up to 40dBm. However, when the input power was 27dBm, the phenomenon of gain extension occurred.

From the results, should I see 27dBm as the MOSFET being broken down? Can i see the breakdown phenomenon in the simulation as well?


thank you
 

"linearity graph of this mosfet?"

Which graph, which Mosfet? what supply? what RdsOn? what source impedance? What Coss? What gain?
Why are you doing this?
A tsmc nmos mosfet was used, and power was input to the drain up to 40dBm or more to design the switch. However, the mosfet gains gain after a power input of more than 27dBm. I am not able to understand this phenomenon.
 

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