I doubt why you need async RAM. Xilinx RAM is sync write, async read. That has been good enough for me for the past.netghost said:How can I implement a asyn ram in Xilinx ?
Does Xilinx only support syn ram?
_http://www.xilinx.com/xcell/xl32/xl32_34.pdfdada said:it has to be genrated by using only CLB`s (combo) .
Very interesting, both the links indicate that an asynchronous ram is possible in a xilinx FPGA.Zerox100 said: