How can debug [00:04:42] Process be terminated. Status: Failure ( Vivado 2019.1 )

[stackprogramer]

I want to develop a new verilog module, But In spite of that test
bench file works fine, but in making bitstream I am faced with errors...
Errors:
How can debug [00:04:42] Process terminated. Status: Failure
What's this error means in Verilog code?
I had not any errors but the process is terminated, My environment Vivado 2019.1 in Linux ubuntu, can any one which causes this problems.

Warnings: 313
Critical Warnings: 0
Errors: 0

 

[ads-ee]

That isn't a Verilog error per se, it's a tool error from Vivado. You should post the entire build log that leads up to this error.