ENTITY example IS
PORT( out_en : IN STD_LOGIC;
in_bus : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
out_bus : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
bi_bus : INOUT STD_LOGIC_VECTOR(3 DOWNTO 0));
ARCHITECTURE rtl OF example IS
BEGIN
out_bus<=bi_bus;
bi_bus<=in_bus WHEN out_en='0' else (others => 'Z');
END rtl;