davyzhu
Advanced Member level 1
adder overflow
Hi all,
I want to add two 6 bits signed digit.
Something like 6'b10_0110, the MSB '1' is negative digit,other'00100' is absolute value.
Or Something like 6'b00_0110, the MSB '0' is positive digit,other'00100' is absolute value.
How to design a signed adder to add these too signed digit?
Now I convert it to 2's complement,add, and convert it back to signed digit.
But the overflow control seems not be a easy task.
BTW, I use Verilog.
Any suggestions will be appreciated!
Best regards,
Richard
Hi all,
I want to add two 6 bits signed digit.
Something like 6'b10_0110, the MSB '1' is negative digit,other'00100' is absolute value.
Or Something like 6'b00_0110, the MSB '0' is positive digit,other'00100' is absolute value.
How to design a signed adder to add these too signed digit?
Now I convert it to 2's complement,add, and convert it back to signed digit.
But the overflow control seems not be a easy task.
BTW, I use Verilog.
Any suggestions will be appreciated!
Best regards,
Richard