May 2, 2012 #1 D Dasco Junior Member level 2 Joined Jul 21, 2008 Messages 22 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,435 Hello all, I want to be able to enable and disable memory segments with control signals. example: making 0x0800 0000 to 0x0900 0000 accessible with test_signal_1 == 1 how can i do that ( in verilog but VHDL is ok too) ?? thanks in advance for any reply
Hello all, I want to be able to enable and disable memory segments with control signals. example: making 0x0800 0000 to 0x0900 0000 accessible with test_signal_1 == 1 how can i do that ( in verilog but VHDL is ok too) ?? thanks in advance for any reply