high Q bandpass filter design

[lhlbluesky]

i want to design a active bandpass filter, Q>10, center frequency f0=20KHz, stop band attenuation as large as possible, and use as small as possible external components, and only one off-chip component is allowed (a R or a C), the other components to be on-chip, what type of BPF can i use?
in my opinion, i want to design a two-order BPF, but as i know, f0 is usually decided by at least two R and two C, such as f0=1/(sqrt(C1*C2*R1*R2)*2*pi), so if i use only a R or a C to tune the f0, the linearity is not better.
besides, the opamp non-ideal characteristics can have much influence on the BPF performance. so, how to consider this or how to design the opamp parameters (such as DC gain, GBW, PM, etc).
thanks all.

 

[Avla 0652]

Maybe you should try "switched capacitor filter", like LTC1059 for example
but they need clock signal.

 

[LvW]

Ihlbluesky,

As far as I could understand your requirements you need a bandpass of second order, which can be frequency-tuned with one single element only, correct?
This seems to be a rather complicated case - in particular, if you require that other bandpass parameters (maximum gain, Q or bandwidth) remain unaffected by tuning of the frequency.
What are your requirements as far as these parameters are concerned?

 

[lhlbluesky]

first, i don't want to use switched capacitor filter; second, 'As far as I could understand your requirements you need a bandpass of second order, which can be frequency-tuned with one single element only, correct?', you are right, LvW. this is difficult indeed. my most important parameter requirements are: Q>10, f0=20Khz and tunable easily (it is the best to tune f0 with one single element only).
thanks.

 

[LvW]

Ihlbluesky,

The requirement to tune the center frequency is not the main problem - but the question if resp. which of the remaining two properties (Q and maximum gain) have to remain unaffected (that means constant)

 

[lhlbluesky]

hi, LvW. when tuning the center frequency f0, Q has to remain unaffected(>10), and using only one tuning component (it is the best to use a single R). thanks.

 

[FvM]

I'm sure, you're aware of the fact that a second order filter needs at least two capacitors, if we exclude inductors for the design. In so far, one off-chip capacitor doesn't make much sense.

Does your IC technology offer capacitors of sufficient capacitance to implement an analog 20 kHz filter?

In this case, a possible implementation could refer to a GMC topology with the external element controlling OTA gm. I can't imagine another topology meeting your requirements.

 

[lhlbluesky]

i will try GMC topology.
besides, i have seen a chip U2538B, whose f0 can be adjusted by a single R, and in U2538B datasheet,
R(K ohm)=8855/f0(KHz)-13, R is the only off-chip tuning resistor. i want to use the similar structure.
thanks.

 

[LvW]

hi, LvW. when tuning the center frequency f0, Q has to remain unaffected(>10), and using only one tuning component (it is the best to use a single R). thanks.

Ihlbluesky, are you sure that Q (and NOT the bandwidth B=Fo/Q) should remain constant during tuning the frequency Fo?

 

[lhlbluesky]

in my case, i want a high Q BPF, so, if i make BW constant when tuning f0, then, Q may change a lot when f0 has a large tuning range. that is, f0 and Q can be tuned independently.
besides, if i design a GMC BPF of f0=20KHz, is the center frequency too low here?

 

[LvW]

in my case, i want a high Q BPF, so, if i make BW constant when tuning f0, then, Q may change a lot when f0 has a large tuning range. that is, f0 and Q can be tuned independently.
besides, if i design a GMC BPF of f0=20KHz, is the center frequency too low here?

I must confess - I do not understand the meaning of your posting. Why do you ask if the center frequency is "too low"?

 

[FvM]

if i design a GMC BPF of f0=20KHz, is the center frequency too low here?

I guess you refer to technology constraints? As previously mentioned, it's a matter of your available IC technology and chip area. Capacitors in a 10 pF order of magnitude are usually feasible, this refers to sub µA OTA currents and respective high noise.

 

[LvW]

...i will try GMC topology......

Ihlbluesky,

In this context (gmC technique) I have another hint for you:

Perhaps you have heard already about the "current conveyor", which is nothing else than an OTA with a low-impedance inverting input.
Such a device is available as a commercial IC (AD844) and contains onboard also an output buffer (providing a voltage output).
In the past, a lot of papers using this device have been published describing new filter and oscillator topologies.
Perhaps it`s interesting for your purpose.
But you should know that the AD844 in nearly all publications is described as a "current-feedback amplifier CFA" (current conveyor+buffer=CFA).
Thus, searching for applications using this device you should use keywords like "CFA-based filters" or "filters with current-feedback amplifiers".

 

[lhlbluesky]

ok, thanks for all the reply.
I must confess - I do not understand the meaning of your posting. Why do you ask if the center frequency is "too low"?
what i mean here, i want to make Q>10 when tuning f0. and f0~gm/C, i have seen some papers about GMC BPF filter, but the f0 is usually larger than 1M, so is f0=20KHz possible here?
Capacitors in a 10 pF order of magnitude are usually feasible, this refers to sub µA OTA currents and respective high noise.
can you mean that, if i choose C=10pF, then i will have a low OTA current and high noise? if so, the BPF is bad (not suppress noise very well), right?

 

[FvM]

I'm not sure what you want to achieve. You have asked about a filter without exernal capacitors, thus I assume, you are doing an IC design. In this case you should know the parameters of your available analog IC process and be able to simulate a design to check for noise performance and similar.

If you possibly mean designing the filter with a ready-made IC, I don't think that it's feasible.

 

[lhlbluesky]

yes, i'm doing an IC design.

 

[LvW]

yes, i'm doing an IC design.

Sorry for my posting#13 - I forgot that you are going to do an IC design.