High current MOSFET driver

[red_alert]

I'm in the process of redesigning (upgrading) my sine wave inverter and I don't find a suitable (integrated) MOSFET high side/low side driver.

I'm going to use 6 x IRFP4668 in parallel mode for every high side / low side H-bridge switch.

So far I bought some IRS21864 (4 Amp MOSFET driver) but I don't know if that's enough current to drive those MOSFETs.

The switching frequency will be low enough (10 khz) and the nominal switching current is 100 A (from a 48V battery string) for a total of 5 kW rated power.

The IRFP4668 has a total gate charge of 160 nC (max 240) so for six of them I'll have over 1000 nC gate charge.

Does anyone know of any suitable driver for this situation? The price is not a problem (as is for personal use) but I prefer a integrated one (having multiple protections and controlled delay times than a discrete totem pole). Or maybe I should go with a hybrid one?

 

[FvM]

The usual way is to use discrete transistors or integrated buffers like Diodes ZXGD3003 as current booster, and leave the protection point to an intelligent gate driver.

 

[red_alert]

The above MOSFET driver (IRS21864) has a totem pole output stage. For current boosting, may I simply use a pair of powerful MOSFETs at its output (in totem pole configuration, too)?

 

[schmitt trigger]

I would rather use a NPN/PNP pair. Far easier to bias properly and to prevent shoot-thru.
The penalty is that you lose one Vbe in each direction.

 

[red_alert]

One Vbe could be a problem (by increasing the switching loses).

But it just crossed my mind (so I didn't check the web for any references): what if I put in parallel two (or more) MOSFET driver ICs??

If their parameters are pretty close and they are driven by the same input signals, it should be OK. Or not?

 

[schmitt trigger]

If their parameters are pretty close and they are driven by the same input signals, it should be OK. Or not?

Are they? I don't think that is a guarantee.
But something could be worked out. Instead of straight paralleling of outputs and loads, have one driver actually drive one group of 3 Mosfets, and the other driver driving the other 3.

Something you have not mentioned is the switching frequency. The average current is directly proportional to switching frequency.

 

[red_alert]

The switching frequency is 10 kHz (50 Hz modulated) as mentioned in my first post.

The most important parameter of driver ICs (in case of parallel connection) seems to be the propagation delay. Your interesting solution depends on this parameter too.

If one driver fires up its output earlier it will have to supply the whole load current. Anyway, the matching parameter might not be so critical for the given switching frequency (10 kHz).

 

[schmitt trigger]

Correct, 10Khz.

My solution prevents cross conduction between driver ICs, which could cause potentially damage.

 

[red_alert]

Still the problems may occur (theoretically) if one MOSFETs grup is switched early - it must supply the entire load current.

Cross conduction may occur too, but at the MOSFETs level.

I have to do some math to calculate the possible propagation diferences. If that's only few tens of ns it might be OK.

 

[FvM]

Recent fast gate drivers have typical 20 ns propagation delay (e.g. 9A driver FAN312x) and respective low delay skew. There shouldn't be a problem of using multiple drivers for transistors groups in usual applications. You have to charge up possible delay skew against the actual output current rise and fall time, which is mainly ruled by MOSFET source and additional circuit inductance.

Your reservation against bipolar current boosters don't sound substantiated however. You'll have difficulties to detect the effect of 0.7 V voltage drop at all with 10 or 12 V gate driver voltage. In addition, you can bypass the buffer by a low ohmic (e.g. 10 to 100 ohms) resistor so that the gate voltage reaches VDD/VSS for most of the time.

 

[red_alert]

Your reservation against bipolar current boosters don't sound substantiated however. You'll have difficulties to detect the effect of 0.7 V voltage drop at all with 10 or 12 V gate driver voltage

Like for every semiconductor forward voltage drop, I am aware of Vbe x Ic loses (0.7 V x 10 A) not necessary the output voltage reduction (although I must admit it's just a pulse current).

So it has to be simple like that?



Any clue about what bipolar transistor should I use?

 

[FvM]

Preferably transistors with sufficient beta at high currents. Zetex/Diodes has 10A switching transistors in SOT23 package, If they are too small for your purposes, complementary audio power transistors in the 4 to 10 A class.

 

[red_alert]

Looking for suitable bipolar transistors I found some high current (single output) MOSFET drivers: Microchip TC4452. Reading the datasheet, I didn't found any typical application diagram so I wonder if I could use them as high side current boosters, too?

I mean, may I put them between IRS2110 (e.g.) high side output and the H-bridge high side MOSFETs gate? May I feed their Vdd with IRS2110 bootstrap capacitor voltage and its GND with IRS2110 COM terminal?

 

[bowman1710]

Have you tried looking at?

https://www.intersil.com/en/product...r-vrm-imvp/drmos--driver---fet-/ISL99140.html

 

[D.A.(Tony)Stewart]

(quasi) Steady State Conduction Losses also have cascade effects on Commutation Losses where high driver RdsOn to gate leads to slow commutation time of the output switch. This includes Tail Current when turning off a device.

Consequently rise and fall times total ought to be < 2% of the PWM interval.

While lower RdsOn reduces conduction loss, it also raises Qg which slows gate transition time when the gate is driven by a high resistance. Thus when using PWM, the key factor is the ratio of RdsOn from stage to stage. Now there are variations of ratios due to high Vds ratings and usage as well as variations in Vgs threshold and drive current limit.

Qg is the sum of junction capacitance and the Varactor effect of the body diode, so as RdsOn reduces as does resistance of the body diode and the bulk almost proportionally increases the dynamic Qg.

Saturated bipolar stages are tested with Ic:Ib ratios of 10:1 or 50:1 but with high hFE sorting designs can achieve in rare cases 200:1 for saturated gain at low current. As current levels increase significantly in rated devices this can drop to 5:1.


I propose that when cascading MOSFET's one must consider that a low Qg*RdsOn product is a desirable result. Although not quite constant, it is also a function of Vdss (max) , it is a useful comparative measure in part selection.

The real problem with mismatched propagation delays in large parallel MOSFETs is they can lead to higher risk of shoot-thru.
The selection of a single 30A-40A driver to a totem pole 300A half-bridge switch cannot be understated. Trying to drive 1000A peaks with 6 parallel devices not carefully selected and designed just using a 4A driver is sure to fail.

I would consider the current drive capability to be in the 1~10% range of the output switch current drive ... for each stage of the drivers...

Gate current must be limited in many cases with a series R or CR/R/C network to control slew rate and limit gate power dissipation.

3% might be a reasonable goal or an effective current gain of 33. ...Tony

Naturally this benefits the minimizing total rise time for commutation pulse losses while reducing Conduction losses.

Generally IGBT's are preferred for >800V with many benefits and bipolar emitter followers which have a input current in the 2~3% range have lower input capacitance and good bandwidth with some diode drop which may be negligible in a 48V system to drive MOSFET gates.

Also Relays can have a coil to contact current gain up 5000 but are slow, an analogy, I like to bring up but of course cannot handle high frequency commutation. MOSFETs can have similar issues with the PWM drivers overheating or the gate driver overheating if one overlooks this current drive gain effect for pulses.


Also keep decoupling caps close to each switch at least 50x the load capacitance to drive high current pulses.

Layout of parallel MOSFETS is crucial to matching prop delay to prevent if some load impedance causes shoot thru.
Dead-band control is critical and Temperature coefficient must be positive to prevent thermal runaway.

Power dissipation must be predicted and verified in every part and path under a wide range of load impedances for a design to be robust.

 

[red_alert]

Thanks everybody for your suggestions.

I've read alot about discrete (bipolar) drivers but still I have a question: how to implement a totem pole driver for the high side switches? I prefer the bootstrap technique but I don't know if (or how large) a bootstrap capacitor could supply those 10-15 Amps.

I bought some 2STC5242 / 2STA1962 bipolar transistors for the totem pole current buffer. They are rated for 15 Amps and have a turn-on time of 0.2 uS.

I've made some calculations, too. So, for a total Qg of 600 nC (for six paralleled power MOSFETs) and a charge current of 10 Amps, I've got a turn on time of about 60 nS.

The dead time for my current implementation is 2 uS (for a switching frequency of 10 kHz) so I guess there's a minimal risk of shoot-thru.

 

[Electro nS]

Thanks everybody for your suggestions.

I've read alot about discrete (bipolar) drivers but still I have a question: how to implement a totem pole driver for the high side switches? I prefer the bootstrap technique but I don't know if (or how large) a bootstrap capacitor could supply those 10-15 Amps.

I bought some 2STC5242 / 2STA1962 bipolar transistors for the totem pole current buffer. They are rated for 15 Amps and have a turn-on time of 0.2 uS.

I've made some calculations, too. So, for a total Qg of 600 nC (for six paralleled power MOSFETs) and a charge current of 10 Amps, I've got a turn on time of about 60 nS.

The dead time for my current implementation is 2 uS (for a switching frequency of 10 kHz) so I guess there's a minimal risk of shoot-thru.

have you found the solution for using the bipolar transistors with bootstrap ?? , if you tested the circuit please post schemtic for your gate driver with booster please
i am having same problem ,

- - - Updated - - -

The usual way is to use discrete transistors or integrated buffers like Diodes ZXGD3003 as current booster, and leave the protection point to an intelligent gate driver.

so if i use 2(one for high side and one for low side) of these ZXGD3003 or AUIR08152S (BUFFER GATE DRIVER INTEGRATED CIRCUIT) after the ir2110 , the half bridge will work exactly the same as ir2110 alone , but with higher current ??? i prefer the idea of IC over discrete transsitors
by the way my mosfet total charge is 2000nC at 16khz and 15v