help on delta sigma ADC

[simon0123]

HI
I am now constructing an ideal model of SC second order delta sigma data converter in Cadence. The structure that I use is CFFB. However, I dont know how to make the feedback path(output from one bit quantizer to first and second SC integrator). Can anyone tell me how to do it? Thanks.

PS. I use digital value (1 , 0) to do the feedback path fisrt. But how can I use 3.3V or 0V to the feedback path. I use 0.35um technology

 

[dongzz201]

you can use ideal comparator , maybe .

 

[simon0123]

Here is the circuit i constructed. But the results are not correct