help needed with the voltage buffer

[Freakwency]

Hi there, somebody please help:
I have a voltage buffer with an open-drain output stage(NMOS) as shown below. The simulation shows good tracking of the output voltage(with respect to the input voltage) but now I got the silicon and the buffer seems to have problem tracking the input when the voltage is close to the power supply(VDDH). In other words, the NMOS cannot turn-off when the input is close to VDDH and there are leakage currents. Can anybody tell me what the possible cause is? Thanks!!

 

[Freakwency]

Hi there, somebody please help:
I have a voltage buffer with an open-drain output stage(NMOS) as shown below. The simulation shows good tracking of the output voltage(with respect to the input voltage) but now I got the silicon and the buffer seems to have problem tracking the input when the voltage is close to the power supply(VDDH). In other words, the NMOS cannot turn-off when the input is close to VDDH and there are leakage currents. Can anybody tell me what the possible cause is? Thanks!!

and by the way, the difference between the output and input voltages are several hundreds of mili-volts!!