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Help needed with a generic based signal error

Avysochin

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Hello dear
there are many examples of such use
Rich (BB code):
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity testbench is
Generic (   
        Nkeybus : positive := 8);            -- input bus width
end testbench;

architecture tb of testbench is

signal key_i : in std_logic_vector (Nkeybus-1 downto 0) := (others => 'X');
signal key_o : out std_logic_vector (Nkeybus-1 downto 0);

but i have the errors:

COMP96 ERROR COMP96_0018: "Identifier expected." "testbench.vhd" 12 16
COMP96 ERROR COMP96_0018: "Identifier expected." "testbench.vhd" 13 16


could you advice me
 

kaz1

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Hello dear
there are many examples of such use
Rich (BB code):
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity testbench is
Generic ( 
        Nkeybus : positive := 8);            -- input bus width
end testbench;

architecture tb of testbench is

signal key_i : in std_logic_vector (Nkeybus-1 downto 0) := (others => 'X');
signal key_o : out std_logic_vector (Nkeybus-1 downto 0);

but i have the errors:

COMP96 ERROR COMP96_0018: "Identifier expected." "testbench.vhd" 12 16
COMP96 ERROR COMP96_0018: "Identifier expected." "testbench.vhd" 13 16


could you advice me
you should remove that generic from testbench interface but set bitwidth inside the architecture as you like
 

TrickyDicky

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@kaz1 why? Its not unusual to want to run a test using different bitwidths. This can only come via a constant in the architecture or generic on the TB. Using a generic means you can simply re-run it multiple times with the generic supplied by the running script.

@Avysochin simply remove "in" and "out" from the signal declarations. These are simply wires in the tesbench and hence have no direction. A signal cannot be given a direction.
 

kaz1

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@kaz1 why? Its not unusual to want to run a test using different bitwidths. This can only come via a constant in the architecture or generic on the TB. Using a generic means you can simply re-run it multiple times with the generic supplied by the running script.

@Avysochin simply remove "in" and "out" from the signal declarations. These are simply wires in the tesbench and hence have no direction. A signal cannot be given a direction.
yes certainly I missed to read that in/out at signal declaration. I also assumed a standard testbench interface for a beginner would not put generic up there. Going to scripting with default generic on testbench is something I never seen the need for it and it seems too advanced for such setup.
 

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