nandithaa_m
Junior Member level 3
I am trying to design a 3 bit DAC which should work at 10 MHz. I started designing by using R-2R ladder. I gave the inputs such that digital state changes from 000 to 111 for every 10 MHz. I am unable to get the exact output. If I slow down the clock its working (suppose to 1 MHz, 100k). Its working. I can see steps.
I think the problem is with the loading of the opamp.
What should I do if want to shift the pole of the opamp to higher frequencies.
PLZ help me.
I am attaching the circuit diagram as well as the simulations below.
and one more question?
how to add a follower to this circuit (to the o/p of opamp). The circuit should drive 5pf load.
I think the problem is with the loading of the opamp.
What should I do if want to shift the pole of the opamp to higher frequencies.
PLZ help me.
I am attaching the circuit diagram as well as the simulations below.
and one more question?
how to add a follower to this circuit (to the o/p of opamp). The circuit should drive 5pf load.