hi, i going to implement ifft on fpga i know i need complex multiplier and addition but how determine the resolution of fft output (number of bits of i/o) also how to make test to my desgin if y have code for this 8 ifft but i will make 64 ifft but to able to understand the code project send me,also tell me the steps in details please ;
thanks for y help
What is meant by output resolution? Your input has to be of a fixed-block length and the output will have the same fixed length 'N". Is the code that you have scalable? Just do the appropriate changes at the input (scrambling), scale the butterflies and you get the 64 bit ifft.