Jan 4, 2008 #1 I ilter Member level 4 Joined Jul 22, 2005 Messages 77 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Activity points 2,095 Dear all, I design current dac. But I don't understand two equations. What's its meaning? These are the same or double. And I design latches, my power is use digital power. How do I simulate clk jitter? If my digital power is dirty, how do I do? Thanks.
Dear all, I design current dac. But I don't understand two equations. What's its meaning? These are the same or double. And I design latches, my power is use digital power. How do I simulate clk jitter? If my digital power is dirty, how do I do? Thanks.