Help me solve some LVS matching errors

[calliste]

Hi everybody
I'm using Diva from Cadence to run LVS.
I get many nets and devices mismatch when running an LVS. This is due to M factor of mos transistor, and also because I draw my MOS transistors in Layout using multifingered design. I thought LVS didn't recognize parallel device, but
I checked DivaLVS.rul file and parallel simplification seems to be set by permuteDevice statement. (permuteDevice parallel "nfet")......)
Have anyone been faced to this problem and could help me resolve this???

any help will be very appreciated thanks!!!!

 

[yaasi]

cadence lvs error nfet generic nfet mos

while taking the multifingerd design in layout have u connected all ur sources,drains together?????

 

[calliste]

LVS matching error

yes I have.

 

[yaasi]

LVS matching error

if u get an error in LVS saying that nets and devices mismatch then check with ur connections properly(for nets mismatch).
Are u working in VXL?if u r working in VXL u shud not get nets mismatch.
Also check with ur device parameters properly(for device mismatch).

Check have u connected ur gates together.

 

[cloudliu]

LVS matching error

If the MOS layout in abnormal polygons(45degree to X or Y for example), the software will extract the device with incorrect parameters. If mutiple devices with different parameter, they could not be combined together.

 

[calliste]

LVS matching error

Hi could U please send me the DivaLVS.rul file you used (Maybe it's my rule file which is wrong!)
thks!!

 

[Teddy]

LVS matching error

a) what technology and PDK is it
b) do not use m but PMOS[1:10] syntax.
m ofet causes issues also in simulations - depends on PDK

 

[calliste]

Re: LVS matching error

it's TSMC CMOSP18 PDK. Could you more explain PMOS[1:10] syntax.??

Thanks

 

[Hughes]

LVS matching error

Have you check the rule:

(permuteDevice parallel "nfet")......) [code]
with netlist? The name "nfet" should be the same with in the netlist. If it is "nmos" in netlist, then you should change "nfet" to "nmos".
You may also check if the schematic netlist include "m" parameter. It is defined in CDF whether m is netlisted or not.

 

[calliste]

LVS matching error

yes I checked the rule file permuteDEvice statement are present and it's nfet in both netlist and DivaLVS.rul file.
also m factor is present in the schematic netlist