Ace-X said:Very old task - it was discussed many times on different fpga/asic groups. I will not publish solution right now, probably it will be interesting for some guys here to find solution by their own.
Just keep in mind that it is possible! Our whole Universe needs only 2 inverters to build any logic!
Ace-X.
Black Jack said:Yes, I know solution, but HOW this result are obtained?
Mazi3 said:I do not understand this: using logic and only 2 inverterswhat doest it mean...logic. please explain. are these only AND, OR gates? are this NOR gates? or... XOR gates? which can be used?
jitendra said:The question asked in my interview was: 3 or more independant inputs to be inverted using two NOT gates? I think u need different logic depending on number of inputs. Let me focus on three inputs.
At input we need to add logic to make inputs for two NOT gates. Do we need some logic at output as I need to give three independant outputs and only two outputs from NOT gates are available???
Is it something like multiplexing inputs to use less no of gates?
Thanks,
Jitendra
SUBDESIGN comb_v1
(
y[3..1] :INPUT;
ny[3..1] :OUTPUT;
)
VARIABLE
a, b :NODE;
s[8..1] :NODE;
BEGIN
a=!(y1&y2 # y1&y3 # y2&y3);
b=!(a&(y1 # y2 # y3) # y1&y2&y3);
s8 = a&b;
s7 = a&(y1 # y3) & (y2 # y3);
s6 = a&(y1 # y2)&(y2 # y3);
s5 = b&y2&y3;
s4 = a&(y1 # y2)&(y1 # y3);
s3 = b&y1&y3;
s2 = b&y1&y2;
s1 = y1&y2&y3;
ny1 = s8 # s7 # s6 # s5;
ny2 = s8 # s7 # s4 # s3;
ny3 = s8 # s6 # s4 # s2;
END;
atmaca said:May somebody give a short and understandable answer to this question ?
thanks in advance
Ace-X said:You have 2 inverters and infinite number of OR and AND gates - that's original conditions.
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