module CounterModule(
input Clock,
input VSync,
input HSync,
input Comparator,
output reg [11:0] Distance,
output reg [11:0] Location,
output reg [11:0] CounterDist,
output reg [11:0] CounterLoc,
output reg [11:0] CurrentDist,
output reg [11:0] CurrentLoc
);
always @(negedge HSync or posedge Clock )
begin
if (HSync == 0)
CounterDist <= 0;
else
CounterDist <= CounterDist + 1;
end
always @(negedge VSync)
begin
Distance <= CurrentDist;
Location <= CurrentLoc;
end
always @(posedge Comparator or posedge VSync or negedge HSync)
begin
if (HSync == 0)
CounterLoc <= CounterLoc + 1;
else
begin
if (Comparator == 1)
begin
if (CounterDist < CurrentDist)
begin
CurrentDist <= CounterDist;
CurrentLoc <= CounterLoc;
end
end
else
begin
CurrentDist <= 1023;
CounterLoc <= 0;
end
end
end
endmodule