Help me design a testbed for DDR3 signals testing

[lsimeon]

Hi Guys,

I'm currently designing a testbed for a memory controller. The signals that will be tested are DDR3 signals, so the speed and signal integrity must be considered in choosing the test points and routing the PCB. I chose to put MICTOR as my testpoints so that I can monitor the 34 signals together in one probe. I will also use a TL7000 logic analyzer.

Do you guys have an experience on this? Can you give me an idea on how can I design my testbed better?

thanks,
lsimeon

 

[zel]

hi..
maybe you can try to get the testbench from Altera and make some changes to the testbench.

Thanks