help in making a histogram block

[yupina-chan]

hi. i am trying to make my own histogram block using a dual port ram. my block looks as below. the pixel value will be used as the address for both ports and only one port will be enabled at once (en_b from inverted enable input). port a will be exclusive for reading while port b will be for writing(updating the count). data_a is always '0' because it will not be used as input to any port. i want to read first the value found in the first address inputted (can i do 'read' first? or i should write to it first?) and then add one to it and write it to addr_b to update the count. i made my own code but i can't get it to work (also included). please i need help in this.

 

[TrickyDicky]

The first problem with your design is that you are not allowed a reset on a RAM. You need to manually set each location, one by one to 0. So you will need some external "reset" logic.

 

[yupina-chan]

TrickyDicky, how can i make an external reset and where to put it? Is reset needed in my design?

i've read a post about initializing the ram contents and it says use:

initial
begin

$readmemh("init.dat",mem);


end

can i make use of this? should i make my own init.dat? how to?
or should i use this?

reg [7:0] ram [9:0];
integer i;
initial begin
for (i = 0; i < 10; i = i + 1)
ram[i] = 0;
end

 

[TrickyDicky]

You can initialise the RAM like that, but thats it - its just the power on state, there is no way to "reset" back to this value.

To reset that ram, you will either have to do it from some external source. I assume you have something reading the histograms (a processor perhaps?) so its usually easiest to just get that to wipe the ram after it's finished reading (but writing back 0 to all address locations). Otherwise the simplest way is to just have a counter connected to the address bus so it writes 0 to all addresses.

 

[yupina-chan]

what are the other problems of my code?

 

[yupina-chan]

uhm, i made some changes on my block. and it kinda worked in my simulation. my new block is:

i placed my histogram count inside the ram like this:
if (en_a == 1 && we_a == 0)
q_a <= ram[addr_a] + 1;

is my design synthesizable? it generated a rtl block(?) though. it generated a ram. as for the reset, i made use of the for loop because i don't know how to "have a counter connected to the address bus so it writes 0 to all addresses"

 

[TrickyDicky]

why not post your code....

 

[yupina-chan]

my code is:
View attachment histogram.txt

 

[TrickyDicky]

The initial part just sets all the ram to 0 at the start. There is no mechanism in this code to set the RAM to 0 later.

 

[yupina-chan]

The initial part just sets all the ram to 0 at the start. There is no mechanism in this code to set the RAM to 0 later.

sorry but i don't really get it. why should i add

a counter connected to the address bus so it writes 0 to all addresses

? and how? sorry again.

 

[TrickyDicky]

sorry but i don't really get it.

The memory powers up to 0. Then you add a load of 1s to it to get a number. But you can never set the bins back to 0 again in the current setup. So after a while, they will just wrap-around back to 0 when they max.

How you connect the counter is up to you. It should obviously shouldnt write anything to the memory until there is a rising edge on a "reset" signal, or whatever you want to call it. Then the counter can cycle through the addresses while the write enable is set to '1'. The din_a port can be always connected to 0.

For this, you'll need to mux the incoming address value with the counter.