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[help]iMPACT idcode mismatch problem!

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lupineye

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webpack_9500_prog.exe

Hi!

I have encountered a problem while I'm downloading a program in CPLD.
I'm currently using spartan2 + DIO2 board(CPLD xc95108 C84).
this is the message I got from iMPACT.

ERROR:iMPACT:583 - '2': The idcode read from the device does not match the idcode in the bsdl File.
INFO:iMPACT:1578 - '2': Device IDCODE : 00000000000000000000000000000000
INFO:iMPACT:1579 - '2': Expected IDCODE: 00101001010100000110000010010011

some said this is beacuse of failure of board or CPLD or old bsdl file.

Please give some advices.

thank you very much
 

idcode 00000000000000000000000000000000

Is this the first time you've used iMPACT? It can be confusing. Lots of things can go wrong and cause IDCODE of 0.

Does iMPACT work fine on other boards, or do you have only one board?

Which version of iMPACT are you using? I'm using 9.1.03i for Windows.

Which download cable are you using?

When you launch iMPACT, click "create a new project", then select "Configure devices using Boundary-Scan (JTAG)" and "Automatically connect to a cable and identify Boundary Scan chain", and click "Finish". It should locate your download cable, connect to the board, and then display a diagram showing the chain of JTAG devices on your board. It should also prompt you for the filenames that you want to download into your devices. If that doesn't happen, look in the text status window for suspicious messages.
 

impact:583

thanks for advices

I'm using ISE8.2.03i. I use a standard parallel cable from manufacturer(Digilentinc).

I'm sure that cable is fine. because it worked great when I downloaded bit file in xc2s200.

I already did everything you said.

only one warining message pops up when I clicked iMPACT icon.

"Warning:iMPACT:2257 - startup clock has been changed to 'JtagClk' in the bitstream stored in memory, but the original bitstream file remains unchanged"

What will be the problem?
 

impact idcode

The "startup clock" message is usually harmless. If you are tired of seeing it, BitGen has an option to change the bitstream's startup clock.

On the iMPACT diagram showing the JTAG chain, does it display the correct part number for each device?

Try right-clicking each device, and select "Get Device ID". Do you get sensible (non-zero) IDCODEs?

If you can't find the problem:
https://www.xilinx.com/support/clearexpress/websupport.htm
 

xilinx idcode mismatch

I had built me my own parallel-3 compatible jtag cable. Instead of 74HC125
(original) I used 74AHC125 buffers in the cable which should even perform
better in the necessary level translation. With this cable I had programmed
a lot of different Xilinx devices without any problem. Then came the day
when I tried to program an XC3S400 with this cable with pretty much the same
effect as you have noticed: Even reading the device idea failed.

When looking at the specs for the HC and AHC parts I noticed that the drive strengh is not near enough at the lower supply voltage. I have since used a 74LVC125 part and things work just fine. Although the LVC part comes in an SOIC package, a 14 pin SOIC adapter will correct (Aries A725).
 

impact:1578

Dear,
I have had your problem. I guess you are using old devices (CPLD). You should use an older version of Jtag Programmer. Install it and try programming with it. You can download it at
h__://direct.xilinx.com/direct/webpack/33wp81/webpack_9500_prog.exe

Also read about it at:
h___://www.xilinx.com/support/answers/12740.htm
Or in xilinx answer list.
 

The error message is indicating that either your target board is NOT giving power to the programming adapter, or the TDO line is stuck low. The TDO output in JTAG is open drain. Therefore, if the device is not present, it is normal to read an ID of all "1"s. The pullup resistor for TDO is usually in the programming adapter, therefore your board must be holding it low.

Are you sure the JTAG pinout on your board is correct? Please verify VCC and then check the voltage on TDO. It should be high on idle.

---- Steve
 

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