Help for Verilog-A coding

[analog_adam]

Hi guys;

I need help about a Verilog-A code. This code is a part of an opamp model. The link for the complete model is as follows;

http://www.eda.org/verilog-ams/models/opamp.va

The part that I didn't understand is the bold part in the following;
case (1)
iout > iout_max : iout = iout_max;
iout < -iout_max : iout = -iout_max;
endcase

Could someone explain me what those lines mean.

Thanks for your help in advance.

 

[elbadry]

This is a current-limiter that doesn't allow the current iout to exceed iout_max ( in +ve pr -ve directions )

 

[nanoYasser]

This is a current-limiter that doesn't allow the current iout to exceed iout_max ( in +ve pr -ve directions )

How? Can you explain more please??

Thanks in advance,
Yassorty,

 

[safwatonline]

the diff. OTA have a tail current source which represent the max. current at the output , so u have to limit the current from/to the output to a max. value.
i have a question why do we say the "iout=(vout0-vout)/rout"

 

[analog_adam]

This is a current-limiter that doesn't allow the current iout to exceed iout_max ( in +ve pr -ve directions )

Thank you elbadry. I understand that part, but I still couldn't understand the syntax. Could you please help me with that.

Thanks a lot.

Best Regards,

Added after 1 minutes:

the diff. OTA have a tail current source which represent the max. current at the output , so u have to limit the current from/to the output to a max. value.
i have a question why do we say the "iout=(vout0-vout)/rout"

I think Vout0 is the output of the vcvs and there is the output resistance of the opamp between Vout0 and Vout.

 

[pk3316]

you can check the online manual for a very detail on that

 

[analog_adam]

you can check the online manual for a very detail on that

I searched the reference manual but I couldn't find this syntax. Could you please provide me a link if you find it?