[SOLVED] Help for declaring an array in system verilog in Modelsim 10.1b

manik045 · Jul 22, 2017

I have written the following code in system verilog in Modelsim.

Code:

module mul_array ();
  
 byte md[2:1][3:1]='{'{0,1,2},'{3,4,5}};
 
  initial begin
    $display ("Initial value:");
foreach (md [i,j])  
  $display ("md[%0d] [%0d]=%0d", i,j, md[i][j]);

  end 
endmodule

I have declared the multiple array here but there show two error while compiling.

** Error: E:\New simulation folder\mul_array(3): near "=": Syntax error.
** Error: E:\New simulation folder\mul_array(8): near "$display": syntax error, unexpected SYSTEM_IDENTIFIER, expecting ';'

I have attached the image here. May be it will be very easy to understand.

What is wrong here. I have done my works into .sv file. I do not understand what's wrong i have done here. Does the problem occur due to the absence of the system verilog library file? can anybody help me in this regard.

Thanks in advance.

TrickyDicky · Jul 22, 2017

Because it's an old version of modelsim, have you tried using the -sv switch on vlog?

dave_59 · Jul 22, 2017

Note that the error messages show no *.sv file extension, so the file will only allow Verilog syntax. Make sure they a *.sv file extension.

manik045 · Jul 22, 2017

TrickyDicky would you please give me a briefings about -sv switch on vlog. I have no idea regarding this.

ads-ee · Jul 22, 2017

vlog -sv verilogfilename.v

[SOLVED] Help for declaring an array in system verilog in Modelsim 10.1b

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