hi
i am doing vhdl implemntation of dsss as my b tech project
i have been able to write code for pn sequence generator
i am stuck at bpsk modulator and demodulator
i am not bothering about synchronisation
the demodulator has a low pass filter(integrator) and a decision device
can some on suggest how to implement them
is it possible to implement the filter as fir low pass filter
i have searched the net and found out that one solution is using matlab simulink and xilinx system generator
but i have no idea about what they are and how to implement the above
can any one suggest any guides.
the target fpga i would be using is spartan 3e and xilinx ise 9.2i lite tool
Hi Friends,
We can design the FIR filter with the help of matlab 7.1 or greater version.
go to command window, type "fdatool" design as per ur specifications, then simply convert to vhdl coding. .
its very easy way to convert to vhdl coding, without system gen for filter design.