Well, in LDO you can't bias the backgate much lower than the source, otherwice the source diffusion diode will be forward-biased. Ron should be inversely proportional to the aspect ratio W/L, so I don't understand why you can not achieve low Ron by increasing W/L ratio. There may be a catch in the model - sometimes the NRD and NRS parameters (that determine the resistance of source and drain contacts) are not set correctly in the netlist or in the model, and in this case Ron will stay high regardless of the W/L. To check if this is your problem, try to break you pass PMOS into multiple devices keeping the same overall W/L and check if you get lower Ron, and if you do then it's an indication that there is a problem with NRD/NRS.