Help:about perl script

[hustyw]

Hi,all:
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I wanna write a perl script to control and run a design flow . I'd like my script can find and print each level depth module(submodule) of netlist after RTL synthesis. Another words:When given a netlist, the chosen depth of submodule and nodes can be listed out just use "cmd [option] netlistname.v" .
How to realized it by perl program?Any references and scripts model?I need your help because I'm not very familiar with perl and only study it a short time.

Added after 2 minutes:

My e-mail address is :yinwen(at)ic.sjtu.edu.cn Msn :yinwen372(at)hotmail.com
Looking forward to hearing from you !!

 

[steven852]

Don't know if this is what you want:

my @file;
while (<>)
{
if ($line =~ /^module/g && $line != /^endmodule/g)
{
next;
push($file, $_);
}
}

 

[snake_eyes]

Steven852, Its not that easy!!!
He wants the module heirarchy out of a single netlist file. We need to put some nested loops to get into each hierarchy and print according to hierarchy.
Also, he needs the port list with each module!!

I guess its too much work to be one for free of cost

 

[hustyw]

I have done it within a week,it really a tough job. It takes a lot of time to parse the module hierachy and macro , and key words etraction should be careful to avoid duplicate and lost of each submodule linked to top.

Added after 5 minutes:

By the way , r there any forums or websites that disscuss about perl ,shell,or tcl for IC designers .
Thx a lot!

 

[stevepre]

Here is one site, but not a forum.

https://www.veripool.com/

 

[steven852]

Oops, sorry I misunderstood the question. I may ask this question next time.