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I meet a strange problem about synplicity for @ltera.
I use AC1K30 in my design and synplicity 7.23 for synthesis.Sometimes the synthesis may take few minutes,but the other time can not complete ,even hours!
When I change the chip from @ltera to Xilinx,example XC2S30,the synthesis speed will be so quick.
Can somebody help me?
I use AC1K30 in my design and synplicity 7.23 for synthesis.Sometimes the synthesis may take few minutes,but the other time can not complete ,even hours!
When I change the chip from @ltera to Xilinx,example XC2S30,the synthesis speed will be so quick.
Can somebody help me?