delon
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Hello,
I am having the following error while trying to compile my SV codes. I'm getting this error for my verification codes.
Error-[SE] Syntax error
Following verilog source has syntax error :
Class declaration outside programs requires "-sverilog -ntb_opts
dtm" switch
"../verification/bench.sv", 4: token is ';'
class test_env;
^
test_env is a class which reads from a configuration file.
I'm not sure what it means. I would appreciate any help. Than
I am having the following error while trying to compile my SV codes. I'm getting this error for my verification codes.
Error-[SE] Syntax error
Following verilog source has syntax error :
Class declaration outside programs requires "-sverilog -ntb_opts
dtm" switch
"../verification/bench.sv", 4: token is ';'
class test_env;
^
test_env is a class which reads from a configuration file.
I'm not sure what it means. I would appreciate any help. Than
