Have a question about Space

[ira2008]

Hi all,
can anyone tell me why we should keep the space between the power bus and signal line more than the minimum value required in the design rule? thanks your reply.

Amy.

 

[dinesh hegde]

With minimum space coupling cap is more between them.
-Dinesh

 

[dick_freebird]

Several possible reasons.

One, supply is liable to be noisy on-chip and quiet high-Z
lines would want some isolation. However this is as true
for digital next to analog, etc. Know your circuit, make
your best guess.

Two, wide metal often has relaxed spacing rules to help
with some lithography problems (tends to be tuned up for
min width lines so fat lines can be wider than drawn, eating
space)

Three, simple extent makes power busses a big defect
target for bridging / whiskers etc, so pareto may have made
some rules of thumb.

Four, power busses have longitudinal AC current so there
may be more coupling than simple capacitance would
suggest - you could have inductive as well.

 

[ira2008]

Several possible reasons.

One, supply is liable to be noisy on-chip and quiet high-Z
lines would want some isolation. However this is as true
for digital next to analog, etc. Know your circuit, make
your best guess.

Two, wide metal often has relaxed spacing rules to help
with some lithography problems (tends to be tuned up for
min width lines so fat lines can be wider than drawn, eating
space)

Three, simple extent makes power busses a big defect
target for bridging / whiskers etc, so pareto may have made
some rules of thumb.

Four, power busses have longitudinal AC current so there
may be more coupling than simple capacitance would
suggest - you could have inductive as well.

thanks very much and i got it.