hi
has any one done comos layout design for analog circuits like PLL, ADC, DAC. i want some guidelines for doing layout on block level and then intergrating it.
How to do routing of signals and supplies on top level. How to isolate noisy blocks from crictical blocks. can any one pls provide some info on this.
There are so many little and important things regarding the analog layout design....its is also very hard to give you the same in nutshell....you could go by the followings for a quick reference.....
1. CMOS --Baker
2. CMOS --Razavi
3. CMOS --Allen
4. Analog -- Johns/Martin
5. Analog -- Gray - Mayer
In these books you will find regarding the layouts in different chapters. If you have the following book could be a good one ...
6. Art of Analog Layout Design....by Hastings
Also in different research papers layout is discussed in discreate manner.....search the process/matching related research papers...
For your concern:
Power routing-->most critical...try to have big paracitic caps between Vdd and Gnd by routing them in parallel with two metal layers...like M3 over M2 and heavy width....this is what done in Si-Ensem for digital
Noise Isolation--> for isolating analog from digital part you could first make a floor plane for them and physically place them separately with a guard ring between them...the guard ring could be deep a well connected to one power rail
analog layout ties closely with analog design,so any special concern(power width, isolation,etc) should be decided by you and analog designer in different IP.and the very important thing is your floorplan