The problem may be one of having multiple valid initial
solutions, and changing the netlist (and the eventual
solution matrix) can change the one that "wins" for no
good reason, just "what happens" in DC solving attempt.
Consider yourself lucky if a simulation shows you this
kind of thing early on, and not (say) the night before
your tapeout review, or at FOK wafer probe.
You should be able to find the true reason for failure
to start oscillating, normal circuit debug. Don't blame
an element that should have no influence just because
it's what you touched last. The first thing you see is
not necessarily the only (or even, the) real cause.