Is the function generator more like an ideal clk source or more like an oscillator circuit?

[goatmxj666]

Hello,

I designed charge pump circuit which is fully integrated, and I'm doing a post layout simulation with cadence.

my charge pump circuit need clock of 20MHz.

So I designed a clock generator too.

then, I did post layout simulation with the charge pump with ideal clock source (vpulse) and the charge pump with relaxation oscillator that makes 20MHz.

Obviously, the simulation results for the two versions are different.

The results are not completely different, but the oscillator is not as fast as the ideal clock source. (but, the frequency was same.)

Later, when I test the chip, if I use a function generator as a clock source, will the result be similar to the using an oscillator or similar to the ideal clock source?

 

[FvM]

Most likely finite edge rise and fall time makes the difference. Also vpulse can be setup with different edge speed. You want the simulation setup to reflect the real operation conditions of your circuit, whatever they are.

 

[BradtheRad]

Working with real 4069UBE (unbuffered invert-gate) IC's I find they change state slowly compared to other IC's.
Used in an oscillator circuit, the waveform doesn't have such sharp corners as we would expect from a logic IC.

Seems to me they have lower internal gain. Their output can even be made to occupy a middle position between Hi and Lo.

An IC which adds a buffered output is like increasing gain a thousand fold. Example, 7400 series. Output snaps either High or Low. No in between.

This tells me if I want a high-frequency pulse generator then I should use an IC which makes rapid transitions. Probably chips specifically designed to be a function generator.