Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Handel-C and SystemC: could they kill VHDL and Verilog?

Status
Not open for further replies.

mart242

Junior Member level 1
Junior Member level 1
Joined
Mar 13, 2003
Messages
18
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
142
handel-c or vhdl

What's your tought on Handel-C and SystemC versus VHDL and Verilog? Do you think they could make VHDL and Verilog disappear?

Me, I think that because of languages like that, software engineers might decide that they "know how to do ASICs and FPGAs" simply because they could design them with a language that looks like C and C++.

Don't get me wrong, languages like that are usefull for validating algorythms and quick prototyping, but you still need to have a strong hardware knowledge. So while managers might think that software engineers could do our a job, I don't think it will ever be the case...
 

nitr8

Member level 3
Member level 3
Joined
Dec 31, 1999
Messages
59
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
Look behind
Activity points
480
handel-c

u must be joking me.
Accellera has already decided for systemverilog to be the next HDL standard. synopsys has also donated some of systemc stuff to them as well.

after vhdl and verilog merged to form accellera. a new war started between superlog and systemc. both were fighting to be the next standard for system level design. but accellera decided otherwise and came up with systemverilog as a standard. co design automation then donated there extensible sysnthsizable code to them and as far as i know systemverilog 3.1 is a subset of superlog. seeing this synopsys also decided to donated stuff to them, these donations from synopsys will be added to systemverilog 3.2 which is supposed to be released in june 2003.

So in essence systemverilog will have the best of both worlds.
 

mami_hacky

Full Member level 6
Full Member level 6
Joined
Mar 28, 2002
Messages
337
Helped
18
Reputation
36
Reaction score
11
Trophy points
1,298
Location
Some where
Activity points
3,428
handel c to verilog

Dear nitr, would you please give some useful links to this new systemverilog. For me it was the first time to hear it. Really, systemC will disappear, and system verilog will get it's place?
 

nitr8

Member level 3
Member level 3
Joined
Dec 31, 1999
Messages
59
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
Look behind
Activity points
480
what%systemc

**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**

Read all of them.
 

joe2moon

Full Member level 5
Full Member level 5
Joined
Apr 19, 2002
Messages
280
Helped
19
Reputation
38
Reaction score
7
Trophy points
1,298
Location
MOON
Activity points
3,717
handelc systemc systemverilog

Please check the topic:
**broken link removed**
 

ME

Advanced Member level 4
Advanced Member level 4
Joined
Mar 14, 2002
Messages
1,309
Helped
55
Reputation
112
Reaction score
40
Trophy points
1,328
Activity points
14,859
handel c versus systemc

nitr8 said:
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**
**broken link removed**

Read all of them.

You posted two of the links twice:
**broken link removed**
**broken link removed**
Are some links missing or have you just used copy - paste?.
 

satya

Member level 3
Member level 3
Joined
Jun 14, 2001
Messages
61
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Location
bangalore
Activity points
530
verilog vhdl systemc future

Hi,
can u please give me a link where I can get the HANDEL-C standard or any books on it.I m looking for it for quite long time...

Thanks in advance,
Regards,
- satya
 

leon

Junior Member level 1
Junior Member level 1
Joined
May 20, 2003
Messages
17
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
430
system c, system verilog or handel-c

Just as the conclusion in this paper, I think that it will need about 5-10 years that the high-level hdl can replace the vhdl/verilog.
 

Rus

Newbie level 6
Newbie level 6
Joined
Mar 28, 2003
Messages
11
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
74
It seems like vhdl/verilog may dissapear from market in near future (10 years for ex)
 

geconom

Full Member level 3
Full Member level 3
Joined
Feb 12, 2002
Messages
179
Helped
6
Reputation
12
Reaction score
3
Trophy points
1,298
Activity points
1,461
SystemC is more than VHDL. It includes RTL semantics with C syntax, and thus it may replace VHDL. However, this will not be a methodology shift. Instead of writing "while clk'event and clk=1" we can write "sensitive_pos(clk)". The methodology will be the same. Where SystemC is strong is system level design (above RTL). At this level we will be able to describe with a common language a lot of different components (hardware, RTOS, application software, device drivers, communication interfaces, e.t.c). We will also be able to perform different refinement steps in all these component types. This will be a methodology shift and this is what SystemC is promising.
 

semicon

Newbie level 6
Newbie level 6
Joined
Feb 18, 2004
Messages
12
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
96
Rus said:
It seems like vhdl/verilog may dissapear from market in near future (10 years for ex)
i don't think so.
 

cmfan

Newbie level 2
Newbie level 2
Joined
Dec 10, 2003
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
16
I think systemc has its ability and advantage in high level modeling and functional verification, especially the system level. It can't replace verilog and vhdl in circuit implementation because its low efficiency when it is compiled to RTL.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top