I based all calculations of the loop on two sources:
1. Switching Power Supplies A to Z Sanjaya Maniktala
2.
https://www.biricha.com/uploads/8/9/8/0/89803127/foundations__part2.b__2.pdf
From what I read the type III compensator improves the stability of the loop because it includes fESR.
With loop simulations I had a lot of problems, I do not know if you need to simulate the entire converter model or just the operational amplifier itself. However, I was able to find the SG3525 model and draw the entire converter model. Of course, for each calculated hardware configuration, using the above-mentioned sources, the inverter was excellent.
Currently, it tests only voltage loops to not mix. The noise that can be seen on the oscillograms is actually very large. Perhaps this is due to the bad running of paths.
Converter diagrams are in the post No. 4.
If I understood correctly a single pole (
fp0?) Should be <1/5 of the LC point, and what should be the frequency of the fcrossover control loop? 1/10 of frequency switching?
As for measuring the output from the error amplifier, it is also strongly noisy. I do not know if this is due to the measurement of the oscilloscope where the probe does the antenna, or maybe the problem is PCB paths.
I will add photos of PCBs to make it easier to see how everything is designed
Thank you for your help and I am asking for your understanding, this is my first converter with feedback.
As you can see the tiles have already gone a bit, the crooked elements of the compensator result only from a huge amount of soldering. In the testing phase, I did not care about aesthetics.